Application specific integrated circuits (ASICs) are microelectronic devices that are designed and configured to carry out sets of instructions for specific applications. Application specific integrated circuits are preferable over general-purpose of-the-shelf devices when speed, performance or device compactness is desired, or when the specific functionality cannot be obtained by available devices. Generally, the logic portion of an ASIC device is implemented by either standard cell or gate array technology. In the gate array technology an array of cells comprising simply interconnected transistors is provided by tiling and repeating the same cell over and over again. Sometimes a gate array block may be found within a standard cell device or a full custom device. In gate array technology, the metal interconnections are customized for each application. The customization of the metal interconnection layers determines the functionality of the cells and enables the desired application.
For purpose of simplicity, cost savings and short delivery time it is desirable to minimize the number of metal interconnect layers that need to be modified to implement a given functionality. For that purpose, the repetitive cells that build the array must be designed and constructed so they can provide simple as well as complex functionality with minimal overall modifications of the device.
U.S. Pat. Nos. 5,684,412, 5,751,165 and 5,861,641 describe logic cells comprising a cascade of multiplexers that are useful for a gate array that can be programmer by modifying only one or two layers of a multi-layer interconnect structure of the device. The function of each of these cells is input selectable. However, those logic cell structures have the drawback that when it is desirous to implement two simple functions such as two inverters in parallel, two separate unit logic cells have to be employed. This reduces the area utilization of the device, reduces its performance and increases its cost.
The following additional U.S. Patents also represent the state of the prior art: U.S. Pat. Nos. 5,751,162; 5,428,304.